Staff photo for

Research Topics

  • Hardware Beschleuniger

Short CV

  • since 2020

    Graduate Research Associate in the Embedded Systems and Applications Group (ESA), TU Darmstadt

  • oct. 2019 - apr. 2020

    Internship, Xilinx

  • 2016-2018

    Master in Advanced Microelectronics, Politehnica University of Bucharest

  • june 2016 - oct. 2017

    Working Student, Infineon

  • 2012-2016

    Bachelor in Applied Electronics, Politehnica University of Bucharest

Publications

  1. Oppermann, J., Damian-Kosterhon, B. M., Meisel, F., Mürmann, T., Jentzsch, E., and Koch, A. (2024). Longnail: High-Level Synthesis of Portable Custom Instruction Set Extensions for RISC-V Processors from Descriptions in the Open-Source CoreDSL Language. In Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, ASPLOS ’24 (pp. 591–606). New York, NY, USA: Association for Computing Machinery. doi: 10.1145/3620666.3651375
    DOI URL
    Bibtex
    @inproceedings{oppermann2024asplos,
      author = {Oppermann, Julian and Damian-Kosterhon, Brindusa Mihaela and Meisel, Florian and M\"{u}rmann, Tammo and Jentzsch, Eyck and Koch, Andreas},
      title = {Longnail: High-Level Synthesis of Portable Custom Instruction Set Extensions for RISC-V Processors from Descriptions in the Open-Source CoreDSL Language},
      year = {2024},
      isbn = {9798400703867},
      publisher = {Association for Computing Machinery},
      address = {New York, NY, USA},
      url = {https://doi.org/10.1145/3620666.3651375},
      doi = {10.1145/3620666.3651375},
      booktitle = {Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3},
      pages = {591–606},
      numpages = {16},
      location = {, La Jolla, CA, USA, },
      series = {ASPLOS '24}
    }
    
  2. Damian, M., Oppermann, J., Spang, C., and Koch, A. (2022). SCAIE-V: An Open-Source SCAlable Interface for ISA Extensions for RISC-V Processors. In 2022 The 59th Design Automation Conference (DAC). doi: 10.1145/3489517.3530432
    HiPEAC Award Preprint DOI URL
    Bibtex
    @inproceedings{damian2022dac,
      title = {SCAIE-V: An Open-Source SCAlable Interface for ISA Extensions for RISC-V Processors},
      author = {Damian, Mihaela and Oppermann, Julian and Spang, Christoph and Koch, Andreas},
      booktitle = {2022 The 59th Design Automation Conference (DAC)},
      year = {2022},
      url = {https://doi.org/10.1145/3489517.3530432},
      doi = {10.1145/3489517.3530432}
    }
    
  3. Ecker, W., Adelt, P., Müller, W., Heckmann, R., Krstic, M., Herdt, V., Drechsler, R., et al. (2022). The Scale4Edge RISC-V Ecosystem. In 2022 Design, Automation & Test in Europe Conference (DATE). doi: 10.23919/DATE54114.2022.9774593
    Preprint DOI
    Bibtex
    @inproceedings{s4e2022date,
      author = {Ecker, Wolfgang and Adelt, Peer and M{\"{u}}ller, Wolfgang and Heckmann, Reinhold and Krstic, Milos and Herdt, Vladimir and Drechsler, Rolf and Angst, Gerhard and Wimmer, Ralf and Mauderer, Andreas and Stahl, Rafael and Emrich, Karsten and Mueller{-}Gritschneder, Daniel and Becker, Bernd and Scholl, Philipp and Jentzsch, Eyck and Schlamelcher, Jan and Gr{\"{u}}ttner, Kim and Bernardo, Paul Palomero and Bringmann, Oliver and Damian, Mihaela and Oppermann, Julian and Koch, Andreas and Bormann, J{\"{o}}rg and Partzsch, Johannes and Mayr, Christian and Kunz, Wolfgang},
      title = {The Scale4Edge {RISC-V} Ecosystem},
      booktitle = {2022 Design, Automation {\&} Test in Europe Conference ({DATE})},
      year = {2022},
      doi = {10.23919/DATE54114.2022.9774593}
    }