Als eine Gruppe der Technischen Informatik arbeiten wir an der Schnittstelle von Hardware und Software. Der Schwerpunkt unser aktuellen Forschung liegt dabei auf der effizienten Bereitstellung von Rechenleistung. Effizient heisst hier, dass die in diversen Anwendungsgebieten erforderliche Rechenleistung nicht oder nur mit hohem Energieverbrauch von Standardprozessoren bereitgestellt werden kann.

Als Alternative schlagen wir adaptive Computer vor, die einen kleineren, energieeffizienten Standardprozessor mit einer hoch optimierten rekonfigurierbaren Recheneinheit kombinieren. Letztere kann in ihrer Struktur optimal an die Anforderungen der aktuellen Anwendung angepasst werden und so die Spitzenlast der Rechenleistung bei niedrigerem Energieverbrauch bereitstellen.

Um dieses Ziel zu erreichen, realisieren wir Hardware-Erprobungsplattformen für solche Rechnerarchitekturen (einschließlich der erforderlichen Betriebssystemanpassungen) und erproben diese dann anhand von praktischen Anwendungen. Nach den sehr vielversprechenden Ergebnissen dieser Untersuchungen haben wir unser Augenmerk nun darauf gerichtet, die Programmierbarkeit adaptiver Computer so zu verbessern, dass sie auch von Entwicklern ohne Kenntnisse des Hardware-Entwurfs genutzt werden können. Dazu entsteht ein kompletter Compiler-Fluss, der eine Hochsprache automatisch auf die beiden Recheneinheiten aufteilt. Der an die rekonfigurierbare Recheneinheit zugewiesene Teil wird dann mit Methoden der Hardware-Synthese und des Chip-Entwurfs (Mapping, Platzierung, Verdrahtung) automatisch in eine dort ausführbare Struktur transformiert.

Da wir für dieses Unterfangen natürlich auf die Mitarbeit durch interessierte Studierende mit entsprechenden Vorkenntnissen angewiesen sind, werden für diese Themen auch einführende Lehrveranstaltungen entwickelt.

News

  • Lukas Sommer defends his Ph.D.-thesis

    ​​On 18th October 2021, Lukas Sommer successfully defended his Ph.D.-thesis entitled Programming Heterogeneous Systems with General and Domain-Specific Frameworks. In his work, Lukas investigated general and domain-specific solutions to the challenges of heterogeneous systems programming.

    Lukas’ contributions comprise the identification of key factors to assess the suitability of general programming frameworks for applications and target platforms. Furthermore, he developed a domain-specific compiler for Sum-Product Networks (SPNs) that can target CPUs, GPUs, and FPGAs. The SPN programs produced by Lukas’ compiler can reach inference throughput of multiple orders of magnitude higher compared to existing Python-based libraries.

    Congratulations to Dr.-Ing. Lukas Sommer!

    By Dr.-Ing. Leonardo Solis-Vasquez, 20.10.2021


  • ESA contributes with article on AutoDock-GPU to HiPEAC info 64

    The latest issue of the HiPEAC Info magazine is out now! And it features an article about the latest developments of AutoDock-GPU, the GPU-accelerated molecular docking application we developed in collaboration with the ForliLab at Scripps Research.

    This article describes how AutoDock-GPU helps improving the processing speed of drug discovery simulations, as well as how the AutoDock-GPU’s code has been set to work on computers all over the globe, ranging from Rasberry Pis to servers equipped with high-end GPUs. This is thanks to the recent efforts by Scripps Research and the World Community Grid, which have enabled the use of AutoDock-GPU in the OpenPandemics: COVID-19 project.

    Enjoy reading the full HiPEAC info 64 magazine!

    By Dr.-Ing. Leonardo Solis-Vasquez, 18.10.2021


  • Two ESA papers get accepted at H2RC 2021

    We are very happy to announce that two submitted papers by our group have been accepted for presentation at H2RC 2021.

    The first paper entitled Near Data FPGA-Accelerated Processing of Collective and Inference Operations in Disaggregated Memory Systems – by Carsten Heinz and Andreas Koch – realizes an FPGA-based disaggregated system that extends distributed memory controllers with hardware-accelerated compute capabilities. This work provides a system capable of performing Near-Data Processing (NDP) operations, as well as an automated tool flow aimed for high usability of the proposed technology, even to users unfamiliar with hardware design.

    The second paper entitled Optimizing a Hardware Network Stack to Realize an In-Network ML Inference Application – by Marco Hartmann, Lukas Weber, Johannes Wirth, Lukas Sommer, and Andreas Koch — integrates into the open-source TaPaSCo framework, a high-throughput hardware network stack, which can operate at or close to theoretical performance in a network-attached machine learning inference appliance. Furthermore, this work provides a library of easy-to-use design primitives for network functionality, and thus, aims to facilitate the development of network-attached FPGA-based accelerators.

    Good work everyone!

    By Dr.-Ing. Leonardo Solis-Vasquez, 1.10.2021


  • ESA paper gets accepted at IA3 2021

    We are very happy to announce that our submitted paper has been accepted for presentation at IA3 2021.

    This paper entitled Mapping Irregular Computations for Molecular Docking to the SX-Aurora TSUBASA Vector Engine – by Leonardo Solis-Vasquez, Erich Focht, and Andreas Koch – is a result of the collaboration with NEC Deutschland GmbH.

    This work leverages the vector processing capabilities of the SX-Aurora TSUBASA to efficiently perform molecular docking computations. As a result, docking executions on the Vector Engine (VE) are around 3x faster than a CPU server equipped with 128 cores. Furthermore, in certain cases, the VE achieves comparable performance to a V100 GPU, even though the latter device uses newer chip fabrication technology compared to the VE.

    Good work everyone!

    By Dr.-Ing. Leonardo Solis-Vasquez, 27.09.2021


  • Open position "LLVM / MLIR dialect development" (student assistant, all genders)

    We have an open position for a student assistant (all genders) to help us with the design and implementation of an MLIR dialect to represent a domain-specific language. If you are interested in gaining practical experience with the state-of-the-art compiler framework, and passionate about compiler hacking in general, this is the job for you.

    For more details, have a look at the job offer, and send your applications (or questions!) to Julian Oppermann.

    By Dr.-Ing. Julian Oppermann, 7.07.2021


  • ESA wins Best Paper Award at DASIP 2021

    Our work DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity has won a Best Paper Award at DASIP2021. We are extremely happy. Thanks to the committee for selecting our work!

    Congratulations also to the other nominees on their excellent work!

    By Christoph Spang, 2.02.2021


You can find more news in our archive.