S2|02 Raum B214

(Short-)CV

since 2019

Research Associate at the Embedded Systems and Applications Group (ESA)
2016-2019

M. Sc. Electrical Engineering, ETiT Computer Engineering / Data Technologies, TU Darmstadt
2013-2016

B. Eng. Electrical Engineering, Communications Engineering for Transportation Systems, Dual Studies, DB Kommunikationstechnik GmbH, DHBW Ravensburg Campus Friedrichshafen

Publications

Scheck, M., Lavan, Y., Spang, C., and Koch, A. (2025). SCOoOTER: A RISC-V Processor Framework and Tool Flow for an Architecture-to-Layout Design Course. In Proc. Workshop on Computer Architecture Education (WCAE).
Preprint

Bibtex

@inproceedings{scheck2025scoooter,
  author = {Scheck, Markus and Lavan, Yannick and Spang, Christoph and Koch, Andreas},
  title = {SCOoOTER: A RISC-V Processor Framework and Tool Flow for an Architecture-to-Layout Design Course},
  year = {2025},
  booktitle = {Proc. Workshop on Computer Architecture Education (WCAE)}
}

Meisel, F., Spang, C., Volz, D., and Koch, A. (2024). TaPaFuzz: Hardware-accelerated RISC-V bare-metal firmware fuzzing using rapid job launches. Journal of Systems Architecture. doi: https://doi.org/10.1016/j.sysarc.2024.103288
DOI URL

Bibtex

@article{meisel2024JSA,
  title = {TaPaFuzz: Hardware-accelerated RISC-V bare-metal firmware fuzzing using rapid job launches},
  journal = {Journal of Systems Architecture},
  year = {2024},
  issn = {1383-7621},
  doi = {https://doi.org/10.1016/j.sysarc.2024.103288},
  url = {https://www.sciencedirect.com/science/article/pii/S138376212400225X},
  author = {Meisel, Florian and Spang, Christoph and Volz, David and Koch, Andreas},
  note = {Open access available shortly},
  keywords = {Fuzzing, RISC-V, Coverage, Security, FPGA}
}

Meisel, F., Volz, D., Spang, C., Tran, D., and Koch, A. (2023). TaPaFuzz - An FPGA-Accelerated Framework for RISC-V IoT Graybox Fuzzing. In Workshop on Design and Architectures for Signal and Image Processing, DASIP ’23. Springer International Publishing.
Best Paper Award Preprint

Bibtex

@inproceedings{fm2023dasip,
  author = {Meisel, Florian and Volz, David and Spang, Christoph and Tran, Dat and Koch, Andreas},
  title = {TaPaFuzz - An FPGA-Accelerated Framework for RISC-V IoT Graybox Fuzzing},
  booktitle = {Workshop on Design and Architectures for Signal and Image Processing},
  series = {DASIP '23},
  year = {2023},
  publisher = {Springer International Publishing}
}

Volz, D., Spang, C., and Koch, A. (2022). IPEC: Open-Source Design Automation for Inter-Processing Element Communication. In Applied Reconfigurable Computing. Architectures, Tools, and Applications. Springer International Publishing.
Preprint

Bibtex

@inproceedings{dv2022arc,
  author = {Volz, David and Spang, Christoph and Koch, Andreas},
  title = {IPEC: Open-Source Design Automation for Inter-Processing Element Communication},
  booktitle = {Applied Reconfigurable Computing. Architectures, Tools, and Applications},
  year = {2022},
  publisher = {Springer International Publishing}
}

Spang, C., Lavan, Y., Hartmann, M., Meisel, F., and Koch, A. (2022). DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. In Journal of Signal Processing Systems (Vol. 94, pp. 739–752). doi: 10.1007/s11265-021-01732-5
Preprint DOI URL

Bibtex

@inproceedings{spang2022jsps,
  author = {Spang, Christoph and Lavan, Yannick and Hartmann, Marco and Meisel, Florian and Koch, Andreas},
  title = {DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity},
  journal = {Journal of Signal Processing Systems},
  year = {2022},
  month = jul,
  day = {01},
  volume = {94},
  number = {7},
  pages = {739-752},
  issn = {1939-8115},
  doi = {10.1007/s11265-021-01732-5},
  url = {https://doi.org/10.1007/s11265-021-01732-5}
}

Wolf, D. L., Spang, C., Diener, D., and Hochberger, C. (2022). Advantages of a Statistical Estimation Approach for Clock Frequency Estimation of Heterogeneous and Irregular CGRAs. In ACM Trans. Reconfigurable Technol. Syst. New York, NY, USA: Association for Computing Machinery. doi: 10.1145/3531062
Preprint DOI URL

Bibtex

@inproceedings{spang2022trets,
  author = {Wolf, Dennis Leander and Spang, Christoph and Diener, Daniel and Hochberger, Christian},
  title = {Advantages of a Statistical Estimation Approach for Clock Frequency Estimation of Heterogeneous and Irregular CGRAs},
  year = {2022},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  issn = {1936-7406},
  url = {https://doi.org/10.1145/3531062},
  doi = {10.1145/3531062},
  note = {Just Accepted},
  journal = {ACM Trans. Reconfigurable Technol. Syst.},
  month = apr,
  keywords = {Coarse Grained Reconfigurable Architecture, Machine Learning, Automation, Design Space Exploration, Heterogeneity}
}

Damian, M., Oppermann, J., Spang, C., and Koch, A. (2022). SCAIE-V: An Open-Source SCAlable Interface for ISA Extensions for RISC-V Processors. In 2022 The 59th Design Automation Conference (DAC). doi: 10.1145/3489517.3530432
HiPEAC Award Preprint DOI URL

Bibtex

@inproceedings{damian2022dac,
  title = {SCAIE-V: An Open-Source SCAlable Interface for ISA Extensions for RISC-V Processors},
  author = {Damian, Mihaela and Oppermann, Julian and Spang, Christoph and Koch, Andreas},
  booktitle = {2022 The 59th Design Automation Conference (DAC)},
  year = {2022},
  url = {https://doi.org/10.1145/3489517.3530432},
  doi = {10.1145/3489517.3530432}
}

Spang, C., Meisel, F., and Koch, A. (2021). RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement. In Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS). Springer International Publishing.
Preprint Slides

Bibtex

@inproceedings{spang2021samos,
  title = {RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement},
  author = {Spang, Christoph and Meisel, Florian and Koch, Andreas},
  booktitle = {Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS)},
  year = {2021},
  publisher = {Springer International Publishing}
}

Spang, C., Lavan, Y., Hartmann, M., Meisel, F., and Koch, A. (2021). DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. In Workshop on Design and Architectures for Signal and Image Processing (14th Edition), DASIP ’21 (pp. 26–34). New York, NY, USA: Association for Computing Machinery. doi: 10.1145/3441110.3441146
Best Paper Award Preprint DOI URL Slides

Bibtex

@inproceedings{spang2021dasip,
  author = {Spang, Christoph and Lavan, Yannick and Hartmann, Marco and Meisel, Florian and Koch, Andreas},
  title = {DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity},
  year = {2021},
  isbn = {9781450389013},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  url = {https://doi.org/10.1145/3441110.3441146},
  doi = {10.1145/3441110.3441146},
  booktitle = {Workshop on Design and Architectures for Signal and Image Processing (14th Edition)},
  pages = {26–34},
  numpages = {9},
  keywords = {Fine-Grained Control Flow Integrity, IoT, Real Time, RISC-V, Hardware Security, Low Overhead},
  location = {Budapest, Hungary},
  series = {DASIP '21}
}

Wolf, D. L., Spang, C., and Hochberger, C. (2020). Towards Purposeful Design Space Exploration of Heterogeneous CGRAs: Clock Frequency Estimation. In 2020 57th ACM/IEEE Design Automation Conference (DAC) (pp. 1–6). doi: 10.1109/DAC18072.2020.9218649
Preprint DOI Slides

Bibtex

@inproceedings{spang2020dac,
  author = {{Wolf}, D. L. and {Spang}, C. and {Hochberger}, C.},
  booktitle = {2020 57th ACM/IEEE Design Automation Conference (DAC)},
  title = {Towards Purposeful Design Space Exploration of Heterogeneous CGRAs: Clock Frequency Estimation},
  year = {2020},
  volume = {},
  number = {},
  pages = {1-6},
  doi = {10.1109/DAC18072.2020.9218649}
}