Staff photo for

(Short-)CV

  • since 2019

    Research Associate at the Embedded Systems and Applications Group (ESA)

  • 2016-2019

    M. Sc. Electrical Engineering, ETiT Computer Engineering / Data Technologies, TU Darmstadt

  • 2013-2016

    B. Eng. Electrical Engineering, Communications Engineering for Transportation Systems, Dual Studies, DB Kommunikationstechnik GmbH, DHBW Ravensburg Campus Friedrichshafen

Publications

  1. Spang, C., Meisel, F., and Koch, A. (2021). RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement. In Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS). Springer International Publishing.
    Preprint Slides
    Bibtex
    @inproceedings{spang2021samos,
      title = {RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement},
      author = {Spang, Christoph and Meisel, Florian and Koch, Andreas},
      booktitle = {Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS)},
      year = {2021},
      publisher = {Springer International Publishing}
    }
    
  2. Spang, C., Lavan, Y., Hartmann, M., Meisel, F., and Koch, A. (2021). DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. In Workshop on Design and Architectures for Signal and Image Processing (14th Edition), DASIP ’21 (pp. 26–34). New York, NY, USA: Association for Computing Machinery. doi: 10.1145/3441110.3441146
    Best Paper Award Preprint Slides
    Bibtex
    @inproceedings{spang2021dasip,
      author = {Spang, Christoph and Lavan, Yannick and Hartmann, Marco and Meisel, Florian and Koch, Andreas},
      title = {DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity},
      year = {2021},
      isbn = {9781450389013},
      publisher = {Association for Computing Machinery},
      address = {New York, NY, USA},
      url = {https://doi.org/10.1145/3441110.3441146},
      doi = {10.1145/3441110.3441146},
      booktitle = {Workshop on Design and Architectures for Signal and Image Processing (14th Edition)},
      pages = {26–34},
      numpages = {9},
      keywords = {Fine-Grained Control Flow Integrity, IoT, Real Time, RISC-V, Hardware Security, Low Overhead},
      location = {Budapest, Hungary},
      series = {DASIP '21}
    }
    
  3. Wolf, D. L., Spang, C., and Hochberger, C. (2020). Towards Purposeful Design Space Exploration of Heterogeneous CGRAs: Clock Frequency Estimation. In 2020 57th ACM/IEEE Design Automation Conference (DAC) (pp. 1–6). doi: 10.1109/DAC18072.2020.9218649
    Preprint Slides
    Bibtex
    @inproceedings{spang2020dac,
      author = {{Wolf}, D. L. and {Spang}, C. and {Hochberger}, C.},
      booktitle = {2020 57th ACM/IEEE Design Automation Conference (DAC)},
      title = {Towards Purposeful Design Space Exploration of Heterogeneous CGRAs: Clock Frequency Estimation},
      year = {2020},
      volume = {},
      number = {},
      pages = {1-6},
      doi = {10.1109/DAC18072.2020.9218649}
    }