Former member

Forschungsgebiete

Hardware-Software Partitionierung

Lebenslauf

2003-2009

Studium der Informatik an der TU Darmstadt
2009

Diplom-Informatik
seit 2009

Wissenschaftlicher Mitarbeiter der Fachgruppe Eingebettete Systeme und ihre Anwendungen (ESA)

Publications

Huthmann, J., Podobas, A., Sommer, L., Koch, A., and Sano, K. (2020). Extending High-Level Synthesis with High-Performance Computing Performance Visualization. In 2020 IEEE International Conference on Cluster Computing (CLUSTER), CLUSTER ’20. Piscataway, NJ, USA: IEEE Press.
Preprint

Bibtex

@inproceedings{huthmann2020cluster,
  author = {Huthmann, Jens and Podobas, Artur and Sommer, Lukas and Koch, Andreas and Sano, Kentaro},
  title = {Extending High-Level Synthesis with High-Performance Computing Performance Visualization},
  booktitle = {2020 IEEE International Conference on Cluster Computing (CLUSTER)},
  series = {CLUSTER '20},
  year = {2020},
  location = {Kobe, Japan},
  publisher = {IEEE Press},
  address = {Piscataway, NJ, USA}
}

Huthmann, J., Sommer, L., Podobas, A., Koch, A., and Sano, K. (2020). OpenMP Device Offloading to FPGAs using the Nymble Infrastructure. In K. Miltfield, B. R. de Supinski, L. Koesterke, and J. Klinkenberg (Eds.), OpenMP: Portable Multi-level Parallelism on Modern Systems. Cham: Springer International Publishing.
Preprint

Bibtex

@inproceedings{huthmann2020iwomp,
  author = {Huthmann, Jens and Sommer, Lukas and Podobas, Artur and Koch, Andreas and Sano, Kentaro},
  title = {OpenMP Device Offloading to FPGAs using the Nymble Infrastructure},
  editor = {Miltfield, Kent and de Supinski, Bronis R. and Koesterke, Lars and Klinkenberg, Jannis},
  booktitle = {OpenMP: Portable Multi-level Parallelism on Modern Systems},
  year = {2020},
  publisher = {Springer International Publishing},
  address = {Cham}
}

Huthmann, J., and Koch, A. (2015). Optimized High-Level Synthesis of SMT Multi-Threaded Hardware Accelerators. In International Conference on Field-Programmable Technology (FPT).
Preprint

Bibtex

@inproceedings{huthmann2015ohlssmtmtha,
  title = {Optimized High-Level Synthesis of SMT Multi-Threaded Hardware Accelerators},
  author = {Huthmann, Jens and Koch, Andreas},
  booktitle = {International Conference on Field-Programmable Technology (FPT)},
  year = {2015}
}

Huthmann, J., Oppermann, J., and Koch, A. (2014). Automatic high-level synthesis of multi-threaded hardware accelerators. In IEEE Proc. Intl. Conf. on Field Programmable Logic and Applications (FPL). IEEE.
Preprint

Bibtex

@inproceedings{huthmann2014a,
  title = {Automatic high-level synthesis of multi-threaded hardware accelerators},
  author = {Huthmann, Jens and Oppermann, Julian and Koch, Andreas},
  booktitle = {IEEE Proc.  Intl. Conf. on Field Programmable Logic and Applications (FPL)},
  year = {2014},
  organization = {IEEE}
}

Liebig, B., Huthmann, J., and Koch, A. (2013). Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add. In Reconfigurable Architectures Workshop.
Preprint

Bibtex

@inproceedings{liebig2013aehp,
  title = {Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add},
  author = {Liebig, Björn and Huthmann, Jens and Koch, Andreas},
  booktitle = {Reconfigurable Architectures Workshop},
  year = {2013}
}

Huthmann, J., Liebig, B., Oppermann, J., and Koch, A. (2013). Hardware/software co-compilation with the Nymble system. In Proc. of the Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).
Preprint

Bibtex

@inproceedings{huthmann2013hscc,
  title = {Hardware/software co-compilation with the Nymble system},
  author = {Huthmann, Jens and Liebig, Björn and Oppermann, Julian and Koch, Andreas},
  booktitle = {Proc. of the Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)},
  year = {2013}
}

Thielmann, B., Huthmann, J., and Koch, A. (2012). Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers. In ACM Transactions on Reconfigurable Technology and Systems. ACM.
Preprint

Bibtex

@inproceedings{thielmann2012mlhlvsrc,
  title = {Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers},
  author = {Thielmann, B. and Huthmann, Jens and Koch, Andreas},
  booktitle = {ACM Transactions on Reconfigurable Technology and Systems},
  year = {2012},
  organization = {ACM}
}

Thielmann, B., Huthmann, J., and Koch, A. (2012). Embedded Systems Design with FPGAs. In P. Athanas, D. Pnevmatikatos, and N. Sklavos (Eds.), .
Preprint

Bibtex

@inbook{thielmann2012wmbacassm,
  chapter = {Widening the Memory Bottleneck by Automatically-Compiled Application-Specific Speculation Mechanisms},
  author = {Thielmann, B. and Huthmann, Jens and Koch, Andreas},
  editor = {Athanas, P. and Pnevmatikatos, D. and Sklavos, N.},
  title = {Embedded Systems Design with FPGAs},
  year = {2012}
}

Thielmann, B., Huthmann, J., Wink, T., and Koch, A. (2011). RAP: More Efficient Memory Access in Highly Speculative Execution on Reconfigurable Adaptive Computers. In IEEE Proc. International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE.
Preprint

Bibtex

@inproceedings{thielmann2011rapmemahserac,
  title = {RAP: More Efficient Memory Access in Highly Speculative Execution on Reconfigurable Adaptive Computers},
  author = {Thielmann, B. and Huthmann, Jens and Wink, Thorsten and Koch, Andreas},
  booktitle = {IEEE Proc. International Conference on ReConFigurable Computing and FPGAs (ReConFig)},
  year = {2011},
  organization = {IEEE}
}

Thielmann, B., Huthmann, J., and Koch, A. (2011). PreCoRe – A Token-based Speculation Architecture For High-Level Language to Hardware Compilation. In IEEE Proc. Intl. Conf. on Field Programmable Logic and Applications (FPL). IEEE.
Preprint

Bibtex

@inproceedings{thielmann2011pcratsafhllhc,
  title = {PreCoRe -- A Token-based Speculation Architecture For High-Level Language to Hardware Compilation},
  author = {Thielmann, B. and Huthmann, Jens and Koch, Andreas},
  booktitle = {IEEE Proc.  Intl. Conf. on Field Programmable Logic and Applications (FPL)},
  year = {2011},
  organization = {IEEE}
}

Thielmann, B., Huthmann, J., and Koch, A. (2011). Evaluation of Speculative Execution Techniques for High-Level Language to Hardware Compilation. In IEEE Proc. 6th Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC). IEEE.
Preprint

Bibtex

@inproceedings{thielmann2011esethllhc,
  title = {Evaluation of Speculative Execution Techniques for High-Level Language to Hardware Compilation},
  author = {Thielmann, B. and Huthmann, Jens and Koch, Andreas},
  booktitle = {IEEE Proc. 6th Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)},
  year = {2011},
  organization = {IEEE}
}

Huthmann, J., Müller, P., Stock, F., Hildenbrand, D., and Koch, A. (2010). Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators. In Dagstuhl Seminar Proc. #10281 on Dynamically Reconfigurable Architectures.
Preprint

Bibtex

@inproceedings{huthmann2010cgacrha,
  title = {Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators},
  author = {Huthmann, Jens and Müller, Peter and Stock, Florian and Hildenbrand, D. and Koch, Andreas},
  booktitle = {Dagstuhl Seminar Proc. #10281 on Dynamically Reconfigurable Architectures},
  year = {2010}
}

Huthmann, J., Müller, P., Stock, F., Hildenbrand, D., and Koch, A. (2010). Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators. In IEEE Proc. Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS). IEEE.
Preprint

Bibtex

@inproceedings{huthmann2010ahlecacgaha,
  title = {Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators},
  author = {Huthmann, Jens and Müller, Peter and Stock, Florian and Hildenbrand, D. and Koch, Andreas},
  booktitle = {IEEE Proc. Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS)},
  year = {2010},
  organization = {IEEE}
}