Staff photo for

Forschungsgebiete

  • Heterogeneous Computing, Parallel Programming
  • High-Level Synthese und Hardware-Entwurf mit modernen HDLs (Chisel, Bluespec)
  • Design Automation

Lebenslauf

  • 2001-2007

    Studium der Medieninformatik an der FH Wedel

  • 2007-2013

    Software Engineer, Frankfurt am Main

  • 2013

    M.Sc. Informatik, TU Darmstadt, Anwendungsfach Math. Logik

  • seit 2013

    Wissenschaftlicher Mitarbeiter der Fachgruppe Eingebettete Systeme und ihre Anwendungen (ESA)

Publications

  1. Heinz, C., Hofmann, J., Korinth, J., Sommer, L., Weber, L., and Koch, A. (2021). The TaPaSCo Open-Source Toolflow. Journal of Signal Processing Systems. doi: 10.1007/s11265-021-01640-8
    Preprint DOI
    Bibtex 
    @article{heinz2021jsps,
  author = {Heinz, Carsten and Hofmann, Jaco and Korinth, Jens and Sommer, Lukas and Weber, Lukas and Koch, Andreas},
  title = {The TaPaSCo Open-Source Toolflow},
  journal = {Journal of Signal Processing Systems},
  year = {2021},
  month = may,
  day = {02},
  issn = {1939-8115},
  doi = {10.1007/s11265-021-01640-8},
  preprint = {https://link.springer.com/content/pdf/10.1007/s11265-021-01640-8.pdf}
}
  2. Korinth, J., Hofmann, J., Heinz, C., and Koch, A. (2019). The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems. In International Symposium on Applied Reconfigurable Computing (ARC).
    Preprint
    Bibtex 
    @inproceedings{korinth2019ttpscostactbprcs,
  title = {The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems},
  author = {Korinth, Jens and Hofmann, Jaco and Heinz, Carsten and Koch, Andreas},
  booktitle = {International Symposium on Applied Reconfigurable Computing (ARC)},
  year = {2019}
}
  3. Sommer, L., Oppermann, J., Korinth, J., and Koch, A. (2018). Offloading OpenMP Target Regions to FPGA Accelerators Using LLVM. In 2018 European LLVM Developers Meeting.
    Preprint
    Bibtex 
    @inproceedings{sommer2018oomptrfpgaaullvm,
  title = {Offloading OpenMP Target Regions to FPGA Accelerators Using LLVM},
  author = {Sommer, Lukas and Oppermann, Julian and Korinth, Jens and Koch, Andreas},
  booktitle = {2018 European LLVM Developers Meeting},
  year = {2018}
}
  4. Sommer, L., Korinth, J., and Koch, A. (2017). OpenMP Device Offloading to FPGA Accelerators. In International Conference on Application-specific Systems, Architectures and Processors (ASAP).
    Preprint Poster
    Bibtex 
    @inproceedings{sommer2017ompdofpgaa,
  title = {OpenMP Device Offloading to FPGA Accelerators},
  author = {Sommer, Lukas and Korinth, Jens and Koch, Andreas},
  booktitle = {International Conference on Application-specific Systems, Architectures and Processors (ASAP)},
  year = {2017}
}
  5. Hofmann, J., Korinth, J., and Koch, A. (2016). A Scalable Latency-Insensitive Architecture for FPGA-Accelerated Semi-Global Matching in Stereo Vision Applications. In IEEE Proc. International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE.
    Preprint
    Bibtex 
    @inproceedings{hofmann2016asliafpgaasgmsva,
  title = {A Scalable Latency-Insensitive Architecture for FPGA-Accelerated Semi-Global Matching in Stereo Vision Applications},
  author = {Hofmann, Jaco and Korinth, Jens and Koch, Andreas},
  booktitle = {IEEE Proc. International Conference on ReConFigurable Computing and FPGAs (ReConFig)},
  year = {2016},
  organization = {IEEE}
}
  6. Brugnoni, S., Corbat, T., Sommerlad, P., Suter, T., Korinth, J., Chevallerie, D. de la, and Koch, A. (2016). Automated Generation of Reconfigurable Systems-on-Chip by Interactive Code Transformations for High-Level Synthesis. In Third International Workshop on FPGAs Software Programmers (FSP).
    Preprint
    Bibtex 
    @inproceedings{brugnoni2016agrscicthls,
  title = {Automated Generation of Reconfigurable Systems-on-Chip by Interactive Code Transformations for High-Level Synthesis},
  author = {Brugnoni, Silvano and Corbat, Thomas and Sommerlad, Peter and Suter, Toni and Korinth, Jens and de la Chevallerie, David and Koch, Andreas},
  booktitle = {Third International Workshop on FPGAs Software Programmers (FSP)},
  year = {2016}
}
  7. Hofmann, J., Korinth, J., and Koch, A. (2016). A Scalable High-Performance Hardware Architecture for Real-Time Stereo Vision by Semi-Global Matching. In IEEE Conference on Computer Vision and Pattern Recognition (CVPR) Workshops. IEEE.
    Best-Paper Runner-Up Preprint
    Bibtex 
    @inproceedings{hofmann2016ashphartsvsgm,
  title = {A Scalable High-Performance Hardware Architecture for Real-Time Stereo Vision by Semi-Global Matching},
  author = {Hofmann, Jaco and Korinth, Jens and Koch, Andreas},
  booktitle = {IEEE Conference on Computer Vision and Pattern Recognition (CVPR) Workshops},
  year = {2016},
  organization = {IEEE}
}
  8. Korinth, J., Chevallerie, D. de la, and Koch, A. (2015). ThreadPoolComposer – An Open-Source FPGA Toolchain for Software Developers. In Second International Workshop on FPGAs Software Programmers (FSP).
    Preprint
    Bibtex 
    @inproceedings{korinth2015tpcaosfpgatsd,
  title = {ThreadPoolComposer – An Open-Source FPGA Toolchain for Software Developers},
  author = {Korinth, Jens and de la Chevallerie, David and Koch, Andreas},
  booktitle = {Second International Workshop on FPGAs Software Programmers (FSP)},
  year = {2015}
}
  9. Korinth, J., Chevallerie, D. de la, and Koch, A. (2015). An Open-Source Tool Flow for the Composition of Reconfigurable Hardware Thread Pool Architectures. In The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE.
    Preprint
    Bibtex 
    @inproceedings{korinth2015aostfcrhtpa,
  title = {An Open-Source Tool Flow for the Composition of Reconfigurable Hardware Thread Pool Architectures},
  author = {Korinth, Jens and de la Chevallerie, David and Koch, Andreas},
  booktitle = {The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM)},
  year = {2015},
  organization = {IEEE}
}
  10. Chevallerie, D. de la, Korinth, J., and Koch, A. (2015). ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators. In ACM SIGARCH Computer Architecture News. ACM.
    Preprint
    Bibtex 
    @inproceedings{de2015lalhpospciegira,
  title = {ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators},
  author = {de la Chevallerie, David and Korinth, Jens and Koch, Andreas},
  booktitle = {ACM SIGARCH Computer Architecture News},
  year = {2015},
  organization = {ACM}
}
  11. Chevallerie, D. de la, Korinth, J., and Koch, A. (2014). Integrating FPGA-based Processing Elements into a Runtime for Parallel Heterogeneous Computing. In IEEE Proc. Intl. Conf. on Field-Programmable Technology (FPT). IEEE.
    Preprint
    Bibtex 
    @inproceedings{de2014ifpgaperphc,
  title = {Integrating FPGA-based Processing Elements into a Runtime for Parallel Heterogeneous Computing},
  author = {de la Chevallerie, David and Korinth, Jens and Koch, Andreas},
  booktitle = {IEEE Proc. Intl. Conf. on Field-Programmable Technology (FPT)},
  year = {2014},
  organization = {IEEE}
}