Dipl.-Inf. Jens Huthmann
		Technische Universität Darmstadt
		FB20 (Informatik)
		FG Eingebettete Systeme und ihre Anwendungen
		Hochschulstr. 10
		D-64289 Darmstadt
		Telefon: +49 6151 / 16-22429
		Fax: +49 6151 / 16-5472
		E-Mail:
		S2/02 (Piloty-Gebäude), Raum E121

Forschungsgebiete

• Hardware-Software Partitionierung

Lebenslauf

2003-2009

Studium der Informatik an der TU Darmstadt

2009

Diplom-Informatik

seit 2009

Wissenschaftlicher Mitarbeiter der Fachgruppe Eingebettete Systeme und ihre Anwendungen (ESA)

Veröffentlichungen

2015

Jens Huthmann, Andreas Koch
Optimized High-Level Synthesis of SMT Multi-Threaded Hardware Accelerators
International Conference on Field-Programmable Technology (FPT), Queenstown (NZ), 12-2015
Paper FPT 2015

2014

Jens Huthmann, Julian Oppermann, Andreas Koch
Automatic high-level synthesis of multi-threaded hardware accelerators
IEEE Proc. Intl. Conf. on Field Programmable Logic and Applications (FPL), Munich (DE), 09-2014
Paper FPL 2014

2013

Liebig, B., Huthmann, J., Koch, A.
Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add
Reconfigurable Architectures Workshop, Mai 2013.
Paper Reconfigurable Workshop 2013

Huthmann, J., Liebig, B., Oppermann, J., Koch, A.
Hardware/software co-compilation with the Nymble system
in Proc. of the Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Darmstadt, 2013
Paper ReCoSoC 2013

2012

Thielmann, B., Huthmann, J., Koch, A.
Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers
ACM Transactions on Reconfigurable Technology and Systems, Vol. 5, No. 3, Article 13, to appear 10-2012
Publisher Preprint

2011

Thielmann, B., Huthmann, J., Koch, A.
Widening the Memory Bottleneck by Automatically-Compiled Application-Specific Speculation Mechanisms
in Embedded Systems Design with FPGAs by Athanas, P., Pnevmatikatos, D., Sklavos, N. (Eds)., Springer, to appear 11-2012
Preprint

Thielmann, B., Huthmann, J., Wink, T., Koch, A.
RAP: More Efficient Memory Access in Highly Speculative Execution on Reconfigurable Adaptive Computers
IEEE Proc. International Conference on ReConFigurable Computing and FPGAs (ReConFig), Cancun (MX), 11-2011
Paper ReConFig 2011

Thielmann, B., Huthmann, J., Koch, A.
PreCoRe -- A Token-based Speculation Architecture For High-Level Language to Hardware Compilation
IEEE Proc. Intl. Conf. on Field Programmable Logic and Applications (FPL), Chania (GR), 09-2011
Paper FPL 2011

Thielmann, B., Huthmann, J., Koch, A.
Evaluation of Speculative Execution Techniques for High-Level Language to Hardware Compilation
IEEE Proc. 6th Intl. Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Montpellier (F), 06-2011.
Paper ReCoSoC 2011

2010

Huthmann, J., Müller, P., Stock, F., Hildenbrand, D., Koch, A.
Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators
Dagstuhl Seminar Proc. #10281 on Dynamically Reconfigurable Architectures, 12-2010
Paper Dagstuhl 2010

Huthmann, J., Müller, P., Stock, F., Hildenbrand, D., Koch, A.
Accelerating High-Level Engineering Computations by Automatic Compilation of Geometric Algebra to Hardware Accelerators
IEEE Proc. Intl. Conf. on Embedded Computer Systems: Architectures, MOdeling and Simulation (SAMOS), Samos (GR), 07-2010
Paper SAMOS 2010

Offene studentische Arbeiten