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Research Topics

  • High-Level Synthesis for FPGA-based accelerators
  • Domain- & application-specific FPGA accelerators and toolflows
  • Concurrent hardware architectures
  • Heterogeneous systems
  • Parallel programming

Short CV

  • 2011-2014

    Bachelor of Science in Computer Science, TU Darmstadt

  • 2014-2016

    Master of Science in Computer Science, TU Darmstadt

  • seit 2016

    Graduate Research Associate in the Embedded Systems and Applications Group (ESA), TU Darmstadt

Publications

  1. Sommer, L., Stock, F., Solis-Vasquez, L., and Koch, A. (2020). DAPHNE - An Automotive Benchmark Suite for Parallel Programming Models on Embedded Heterogeneous Platforms. In D. Ziegenbein, S. Saidi, X. S. Hu, and S. Steinhorst (Eds.), Future Automotive HW/SW Platform Design (Dagstuhl Seminar 19502), Dagstuhl Reports (Vol. 9, pp. 28–66). Dagstuhl, Germany: Schloss Dagstuhl–Leibniz-Zentrum fuer Informatik. doi: 10.4230/DagRep.9.12.28
    Preprint
    Bibtex
    @inproceedings{sommer2020dagstuhl,
      author = {Sommer, Lukas and Stock, Florian and Solis-Vasquez, Leonardo and Koch, Andreas},
      title = {DAPHNE - An Automotive Benchmark Suite for Parallel Programming Models on Embedded Heterogeneous Platforms},
      booktitle = {{{Future Automotive HW/SW Platform Design (Dagstuhl Seminar 19502)}}},
      year = {2020},
      editor = {Ziegenbein, Dirk and Saidi, Selma and Hu, Xiaobo Sharon and Steinhorst, Sebastian},
      volume = {9},
      series = {Dagstuhl Reports},
      pages = {28--66},
      publisher = {{Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik}},
      address = {Dagstuhl, Germany},
      url = {https://drops.dagstuhl.de/opus/volltexte/2020/12010},
      urn = {urn:nbn:de:0030-drops-120101},
      doi = {10.4230/DagRep.9.12.28},
      annote = {Keywords: automotive, hw/sw platforms, real-time systems, systems design automation},
      preprint = {http://dx.doi.org/10.4230/DagRep.9.12.28}
    }
    
  2. Sommer, L., Weber, L., Kumm, M., and Koch, A. (2020). Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs. In 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) (pp. 1–10).
    Preprint
    Bibtex
    @inproceedings{sommer2020fccm,
      author = {Sommer, Lukas and Weber, Lukas and Kumm, Martin and Koch, Andreas},
      booktitle = {2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)},
      title = {Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs},
      year = {2020},
      pages = {1-10}
    }
    
  3. Sommer, L., Stock, F., Solis-Vasquez, L., and Koch, A. (2020). Using Parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study. In 28th EUROMICRO International Conference on Parallel, Distributed and Network-Based Processing (PDP’20).
    Preprint
    Bibtex
    @inproceedings{sommer2020pdp,
      author = {Sommer, Lukas and Stock, Florian and Solis-Vasquez, Leonardo and Koch, Andreas},
      booktitle = {28th EUROMICRO International Conference on Parallel, Distributed and Network-Based Processing (PDP'20)},
      title = {Using Parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study},
      year = {2020},
      keywords = {embedded, automotive, parallel programming, heterogeneous, OpenMP, OpenCL, CUDA}
    }
    
  4. Weber, L., Sommer, L., Oppermann, J., Molina, A., Kersting, K., and Koch, A. (2019). Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs. In International Conference on Field-Programmable Technology (FPT).
    Preprint
    Bibtex
    @inproceedings{weber2019relnsafsiof,
      title = {Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs},
      author = {Weber, Lukas and Sommer, Lukas and Oppermann, Julian and Molina, Alejandro and Kersting, Kristian and Koch, Andreas},
      booktitle = {International Conference on Field-Programmable Technology (FPT)},
      year = {2019}
    }
    
  5. Oppermann, J., Sommer, L., Weber, L., Reuter-Oppermann, M., Koch, A., and Sinnen, O. (2019). SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level Synthesis. In International Conference on Field-Programmable Technology (FPT).
    Preprint
    Bibtex
    @inproceedings{oppermann2019scamlsfhls,
      title = {SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level Synthesis},
      author = {Oppermann, Julian and Sommer, Lukas and Weber, Lukas and Reuter-Oppermann, Melanie and Koch, Andreas and Sinnen, Oliver},
      booktitle = {International Conference on Field-Programmable Technology (FPT)},
      year = {2019}
    }
    
  6. Ober, M., Hofmann, J., Sommer, L., Weber, L., and Koch, A. (2019). High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud. In Fifth International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC).
    Preprint
    Bibtex
    @inproceedings{ober2019h2rc,
      title = {High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud},
      author = {Ober, Micha and Hofmann, Jaco and Sommer, Lukas and Weber, Lukas and Koch, Andreas},
      booktitle = {Fifth International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)},
      year = {2019}
    }
    
  7. Sommer, L., Stock, F., Solis-Vasquez, L., and Koch, A. (2019). Work-in-Progress: DAPHNE - Automotive Benchmark Suite for Parallel Programming Models on Embedded Heterogeneous Platforms. In Proceedings of the International Conference on Embedded Software (accepted for publication 07/2019), EMSOFT ’19. Piscataway, NJ, USA: IEEE Press.
    Preprint
    Bibtex
    @inproceedings{emsoft2019,
      author = {Sommer, Lukas and Stock, Florian and Solis-Vasquez, Leonardo and Koch, Andreas},
      title = {Work-in-Progress: DAPHNE - Automotive Benchmark Suite for Parallel Programming Models on Embedded Heterogeneous Platforms},
      booktitle = {Proceedings of the International Conference on Embedded Software (accepted for publication 07/2019)},
      series = {EMSOFT '19},
      year = {2019},
      location = {New York, NY, USA},
      publisher = {IEEE Press},
      address = {Piscataway, NJ, USA}
    }
    
  8. Sommer, L., Stock, F., Solis-Vasquez, L., and Koch, A. (2019). EPHoS: Evaluation of Programming - Models for Heterogeneous Systems. FAT-Schriftenreihe 317. Forschungsvereinigung Automobiltechik.
    Preprint
    Bibtex
    @article{fat317,
      title = {EPHoS: Evaluation of Programming - Models for Heterogeneous Systems},
      author = {Sommer, Lukas and Stock, Florian and Solis-Vasquez, Leonardo and Koch, Andreas},
      booktitle = {FAT-Schriftenreihe 317},
      year = {2019},
      publisher = {Forschungsvereinigung Automobiltechik},
      preprint = {https://www.vda.de/de/services/Publikationen/fat-schriftenreihe-317.html}
    }
    
  9. Oppermann, J., Reuter-Oppermann, M., Sommer, L., Koch, A., and Sinnen, O. (2019). Exact and Practical Modulo Scheduling for High-Level Synthesis. TRETS, 12(2), 8:1–8:26. doi: 10.1145/3317670
    Preprint
    Bibtex
    @article{oppermann2019epmshs,
      author = {Oppermann, Julian and Reuter{-}Oppermann, Melanie and Sommer, Lukas and Koch, Andreas and Sinnen, Oliver},
      title = {Exact and Practical Modulo Scheduling for High-Level Synthesis},
      journal = {{TRETS}},
      volume = {12},
      number = {2},
      pages = {8:1--8:26},
      year = {2019},
      doi = {10.1145/3317670}
    }
    
  10. Halkenhäuser, M., and Sommer, L. (2019). An alternative OpenMP Backend for Polly. In 2019 European LLVM Developers Meeting.
    Preprint
    Bibtex
    @inproceedings{halkenhaeuser2019aompbp,
      title = {An alternative OpenMP Backend for Polly},
      author = {Halkenhäuser, Michael and Sommer, Lukas},
      booktitle = {2019 European LLVM Developers Meeting},
      year = {2019}
    }
    
  11. Kruppe, R., Oppermann, J., Sommer, L., and Koch, A. (2019). Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language . In 2019 International Symposium on Code Generation and Optimization.
    Preprint
    Bibtex
    @inproceedings{kruppe2019ellvmlspmdvusimdvieal,
      title = {Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language },
      author = {Kruppe, Robin and Oppermann, Julian and Sommer, Lukas and Koch, Andreas},
      booktitle = {2019 International Symposium on Code Generation and Optimization},
      year = {2019}
    }
    
  12. Sommer, L., Oppermann, J., Molina, A., Binnig, C., Kersting, K., and Koch, A. (2018). Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-based Accelerators. In IEEE International Conference on Computer Design (ICCD). IEEE.
    Preprint
    Bibtex
    @inproceedings{sommer2018amspnipfpgaa,
      title = {Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-based Accelerators},
      author = {Sommer, Lukas and Oppermann, Julian and Molina, Alejandro and Binnig, Carsten and Kersting, Kristian and Koch, Andreas},
      booktitle = {IEEE International Conference on Computer Design (ICCD)},
      year = {2018},
      organization = {IEEE}
    }
    
  13. Oppermann, J., Reuter-Oppermann, M., Sommer, L., Sinnen, O., and Koch, A. (2018). Dependence Graph Preprocessing for Faster Exact Modulo Scheduling in High-level Synthesis. In Intl. Conf. on Field Programmable Logic and Applications (FPL).
    Preprint
    Bibtex
    @inproceedings{oppermann2018dgpfemshs,
      title = {Dependence Graph Preprocessing for Faster Exact Modulo Scheduling in High-level Synthesis},
      author = {Oppermann, Julian and Reuter-Oppermann, Melanie and Sommer, Lukas and Sinnen, Oliver and Koch, Andreas},
      booktitle = {Intl. Conf. on Field Programmable Logic and Applications (FPL)},
      year = {2018}
    }
    
  14. Sommer, L., Oppermann, J., Molina, A., Binnig, C., Kersting, K., and Koch, A. (2018). Automatic Synthesis of FPGA-based Accelerators for the Sum-Product Network Inference Problem. In ICML 2018 Workshop on Tractable Probabilistic Models (TPM). ICML.
    Preprint
    Bibtex
    @inproceedings{sommer2018asfpgaaspnip,
      title = {Automatic Synthesis of FPGA-based Accelerators for the Sum-Product Network Inference Problem},
      author = {Sommer, Lukas and Oppermann, Julian and Molina, Alejandro and Binnig, Carsten and Kersting, Kristian and Koch, Andreas},
      booktitle = {ICML 2018 Workshop on Tractable Probabilistic Models (TPM)},
      year = {2018},
      organization = {ICML}
    }
    
  15. Sommer, L., Oppermann, J., Korinth, J., and Koch, A. (2018). Offloading OpenMP Target Regions to FPGA Accelerators Using LLVM. In 2018 European LLVM Developers Meeting.
    Preprint
    Bibtex
    @inproceedings{sommer2018oomptrfpgaaullvm,
      title = {Offloading OpenMP Target Regions to FPGA Accelerators Using LLVM},
      author = {Sommer, Lukas and Oppermann, Julian and Korinth, Jens and Koch, Andreas},
      booktitle = {2018 European LLVM Developers Meeting},
      year = {2018}
    }
    
  16. Sommer, L., Oppermann, J., Hofmann, J., and Koch, A. (2017). Synthesis of Interleaved Multithreaded Accelerators from OpenMP Loops. In 2017 International Conference on Reconfigurable Computing and FPGAs (ReConFig’17). IEEE.
    Preprint
    Bibtex
    @inproceedings{sommer2017simaompl,
      title = {Synthesis of Interleaved Multithreaded Accelerators from OpenMP Loops},
      author = {Sommer, Lukas and Oppermann, Julian and Hofmann, Jaco and Koch, Andreas},
      booktitle = {2017 International Conference on Reconfigurable Computing and FPGAs (ReConFig'17)},
      year = {2017},
      organization = {IEEE}
    }
    
  17. Sommer, L., Korinth, J., and Koch, A. (2017). OpenMP Device Offloading to FPGA Accelerators. In International Conference on Application-specific Systems, Architectures and Processors (ASAP).
    Preprint Poster
    Bibtex
    @inproceedings{sommer2017ompdofpgaa,
      title = {OpenMP Device Offloading to FPGA Accelerators},
      author = {Sommer, Lukas and Korinth, Jens and Koch, Andreas},
      booktitle = {International Conference on Application-specific Systems, Architectures and Processors (ASAP)},
      year = {2017}
    }
    
  18. Oppermann, J., Sommer, L., and Koch, A. (2017). SpExSim: assessing kernel suitability for C-based high-level hardware synthesis. In Journal of Supercomputing.
    Preprint
    Bibtex
    @inproceedings{oppermann2017sesc,
      title = {SpExSim: assessing kernel suitability for C-based high-level hardware synthesis},
      author = {Oppermann, Julian and Sommer, Lukas and Koch, Andreas},
      booktitle = {Journal of Supercomputing},
      year = {2017},
      preprint = {http://link.springer.com/article/10.1007/s11227-017-2101-z}
    }
    
  19. Sommer, L., Oppermann, J., and Koch, A. (2016). C-based Synthesis of Area-Efficient Accelerators for OpenMP Worksharing Loops. In Second International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC).
    Preprint
    Bibtex
    @inproceedings{sommer2016csaeaompwl,
      title = {C-based Synthesis of Area-Efficient Accelerators for OpenMP Worksharing Loops},
      author = {Sommer, Lukas and Oppermann, Julian and Koch, Andreas},
      booktitle = {Second International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)},
      year = {2016}
    }